智能嵌入式愿景
什么是新的！
CoreVectorblox.Neural Network IP and the VectorBlox Accelerator SDK
VectorBlox Accelerator Software Development Kit和PolarFire FPGA在中档FPGA中提供了最有效的CNN实现。机器学习提供功能：
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向量Blox SDK requires a Linux environment for installation. It is hosted in agithub模型动物园和includes:
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PolarFire fpga消耗的电能amo低30%到50%ng competitive mid-range FPGAs. Other significant benefits include:
* VB V1000，VB V500，VB V250是CoreVectorBlox Libero IP的配置 |
Overview
随着计算工作负载移动到边缘，偏光火FPGA总功率低30-50％，而不是竞争中档FPGA，静态功率降低，使其成为一个新的计算密集型边缘设备的理想选择，包括部署的新系列在热和电力限制的环境中。PolarFire FPGA智能嵌入式视觉解决方案包括视频，成像和机器学习IP和工具，用于加速在工业，医疗，广播，汽车，航空航天和国防部航天和国防市场的低功耗，小型因素中需要高性能的设计。
智能嵌入式愿景中的主要偏光件优势
1. Lowest Total Power Consumption among competitive mid-density FPGAs
- 30% to 50% lower power consumption over competitive mid-density FPGAs
- Extended battery life in portable devices like drones, AR/ VR headset, HUDs, portable Ultrasound etc.
- Reduce system cost by eliminating thermal fans and heat sinks
- Realize lower power in 4kp60 HDMI 2.0, 12G SDI, 10G Ethernet, 12.5G CoaXPress etc. using SERDES lanes rated for 90 mW at 10G
2.从11x11 mm开始的小型围类包装100k le
- 使用100k（11x11 mm）和200k（11x14.5 mm）LE设备创建紧凑模块
- Design your next-gen vision platform with small form-factor PolarFire FPGAs with unmatched features like DDR4, LPDDR3, 12.7G SERDES, 1.6 Gbps LVDS I/Os and PCIe Gen2x4
电源消耗竞争基准与16频道音频 - 视频桥设计示例
示例性设计演示了音频到视频桥接实现。它使用56％LUT，35％MathBlocks，DDR3和16通道收发器，在偏光极MPF500T设备中。与相似的密度FPGA相比，基准展示功耗高达52％。
16通道AVB切换器电源估算结果
| AVB Switcher (4 Ch.) | Static (W) | 核心动态（W） | I / O *（w） | 收发器*（W） | Total Power (W) |
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| 极地火（MPF500） | 1.493 | 2.474 | 2.991. | 0.769 | 7.727 |
| Polar Fire (MPF500TLS**) | 1.059 | 2.474 | 2.991. | 0.769 | 7.293 |
| KINTEX 7（XC7K325T-2） | 1.796 | 5.471 | 3.971 | 4.079 | 15.317 |
| Arria V(5AGXFB3H) | 2.572 | 4.350. | 5.451 | 1.651 | 14.025 |
| Zynq US +（XCZU7EV-1L（0.72V）） | 2.864 | 2.165 | 4.011 | 2.694 | 11.7 |
*I/O and Transceiver power estimates include static and dynamic components. **Power Optimized Device
16.Channel AVB Switcher Resource Utilization
| Resources | Count | Interface | 车道 | I / OS. | Rate |
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| 4LUT | 271K | Transceivers | 16. | - | 2.97Gb/s |
| DFF | 188K. | ||||
| LSRAM | 816 | ||||
| uSRAM | 249. | 3x72 bit DDR3 | - | 351. | 800 MB / s |
| MathBlock | 500 |
Learn More
| Learn why Microchip FPGAs consume up to 50% lower-power than competitive mid-density FPGAs? | Learn More |
| Did you know that PolarFire is the world's best FPGA at protecting your IP? | Learn More |
| Do you know what makes Microchip FPGAs the most reliable in the Industry? | Learn More |
| Learn about Libero, the IDE for PolarFire. | Learn More |
| Learn how PolarFire will fulfill your next-generation vision platform requirements. | Learn More |
开始
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PolarFire Video Kit (MPF300-VIDEO-KIT-NS)
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PolarFire视频FMC产品组合
Coaxyabo8855下载press FMC卡 |
SDI FMC Card |
USXGMII FMC卡 |
| CoaxPresyabo8855下载s FMC子卡是用于评估和测试Coaxpress协议的硬件评估平台。价格：849美元。 | SDI FMC daughter card is the hardware evaluation platform for evaluating and testing the Serial Digital interface IP. Price: $499. | The USXGMII FMC daughter card is the hardware evaluation platform for evaluating and testing the quadrate PHY IP. Price: $499 |
| # | Description | 链接 |
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1 |
探索并购买PolarFire视频套件。 | Kit Webpage |
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探索并购买Coaxpress FMC子卡。yabo8855下载 | FMC Webpage |
| 3 | 探索并购买SDI FMC子卡。 | FMC Webpage |
| 4 | Explore and Purchase the USXGMII FMC Daughter Card. | FMC Webpage |
| 5 | Download Libero SoC v12.1 Software for PolarFire FPGAs. | Libero SoC v12.1 Download |
| 6 | The kit comes with one-year free Libero SoC Gold license. Register your Software ID. | 许可 |
| 7 | Download the Dual Camera Video Kit Demo Guide. | DG0849. |
| 8 | Download Design File, Programming Files and GUI Installer. | Design File,程序文件,GUI安装程序 |
| 9 | Explore the Imaging and Video IPs tab for more information. | Go to the Imaging and Video IPs tab. |
| 10. | 探索低功耗偏光5。下载电源估算器UG和Excel工具。 | Low Power UG,Power Estimator |
Out of Box Demo Design for the PolarFire Video Kit
Demo Guide & Programming Files
DG0849：PolarFire 4K FPGA双摄像头视频套件演示指南
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05/2020 |
Imaging and Video IPs
Microchip's FPGA product portfolio offers scalable production-ready IPs through in-house development and using our third-party partner ecosystem. Our in-house IP portfolio covers the latest embedded vision IPs like MIPI, SLVS-EC, CoaXPress, Serial Digital Interface (SDI), HDMI, etc, while our partners cover offerings in Machine Learning, H.264, DisplayPort and HDCP IPs, with many more IPs being added continuously.
Click here看看我们的伴侣IP。
In-house DirectCore Smart Embedded Vision IPs for PolarFire FPGA
| IP | Features | 文档ation |
| mipi csi-2 rx | Up to 1.5 Gbps per lane x 4 lanes, 4Kp60 | UG0806：MIPI CSI-2 RX UG |
| MIPI CSI-2 Tx | 每巷最多1 Gbps x 4车道，4kp30 | UG0826: PolarFire MIPI CSI-2 Tx UG |
| HDMI 2.0 Rx | 支持HDMI 2.0,8位颜色，1080p60 | UG0863: HDMI RX IP UG |
| HDMI 2.0 TX. | Supports HDMI 2.0 and 1.4, 4Kp60 | UG0862: HDMI TX IP UG |
| USXGMII. | 通过以太网Cu PHY支持1,2.5,5和10g：EDCS-1150953 | 请求信息 |
| 3G / HD SDI RX | 1.485 Gbps HD-SDI和2.97 Gbps 3G-SDI | CoreSdirx v2.2手册 |
| 3G / HD SDI TX | 1.485 Gbps HD-SDI和2.97 Gbps 3G-SDI | CoreSditx v2.2手册 |
| 6G / 12G SDI RX | 6 Gbps (1080p120, 2160p30) and 12Gbps (2160p60) | coreuhd_sdirx v2.0手册 |
| 6G / 12G SDI TX | 6 Gbps（1080p120,2160p30）和12 gbps（2160p60） | CoreUHD_SDITX v2.0 Hand Book |
| SLVS-EC. | 在Raw8数据类型中支持2.3 Gbps x 2车道 | UG0877：SLVS-EC RX UG |
| CoaXPress v1.1 | 6.25 Gbps down, 20.83 Mbps up connections, Host and Device IP | UG0875: CoaXPress IP UG |
| ISP Bundle | Bayer, Video DMA, Alpha Blending, Color Space (RGB, YCbCr), Image Sharpening, Display Enhancement, Edge Detection, Display Controller, Pattern Generation, MIPI CSI-2 Rx/ Tx and LVDS 7:1 Display Rx/ Tx | UG0640: Bayer Interpolation UG UG0693: Edge Detection UG UG0639：颜色空间转换UG UG0641：Alpha混合UG UG0646: Display Enhancement UG UG0651：Scaler UG UG0682: Pattern Generator UG UG0649：显示控制器UG UG0944: Histogram User Guide |
For evaluation/purchase of any of the IPs, please fill in the请求信息form, or contactLocal Salesin your area.
CompanionCore Smart Embedded Vision Partner IPs
| Partners | Description | 支持的FPGA. |
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偏光面FPGA. |
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偏光面FPGA. |
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偏光面FPGA. |
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偏光面FPGA. SmartFusion2 SoC FPGAs IGLOO2 FPGA. |
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偏光面FPGA. |
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SmartFusion2 SoC FPGAs IGLOO2 FPGA. |
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SmartFusion2 SoC FPGAs IGLOO2 FPGA. |
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偏光面FPGA. |
请求信息
VectorBlox AI
Overview |
Development Flow |
文档ation |
开始 |
部署选项 |
VectorBlox Accelerator Software Development Kit
VectorBlox Accelerator SDK包含不同的工具，该工具从Tensorflow和Onnx编译到存储在闪存中并加载到DDR内存中的二进制大对象（BLOB）中。
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CoreVectorBlox IP.
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Development Flow
第1步：准备培训的模型 |
Use Python scripts provided in the SDK to convert your trained model into an optimized INT8 representation called a Binary Large Object (BLOB). Run the BLOB through the VectorBlox Simulator to verify accuracy of the network and to ensure successful conversion of the network.  |
第2步：准备你的硬件 |
ThePolarFire Video Kitis configured to run as an AI enabled Smart Camera. The SDK includes a pre-compiled kit image bitstream. Write the bistream into the PolarFire FPGA using theFlashPro程序员包含在套件上。写入从步骤1生成的BLOB，进入套件的SPI闪光灯。  |
Step 3: Write your embedded code |
在基于C / C ++中使用提供的嵌入式代码SoftConsoleIDE and generate and program the hex file. Connect the video kit to a HDMI monitor and turn it on. Modify the embedded code to load and run many CNN BLOBs, switch CNNs dynamically on the fly or load CNNs sequentially for simultaneous inferencing.
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文档ation
| 文档 | Description |
| CoreVectorBlox IP.Handbook | CoreVectorblox.Libero IP Datasheet |
| VectorBlox Programmers Guide | VectorBlox SDK Installation and Tool Flow Environment Guide |
| VectorBlox Demo Guide. | 在PolarFire视频套件中的VectorBlox入门指南 |
| Core VectorBlox IP Release Notes | 当前CoreVectorBlox IP版本的发行说明 |
开始
部署选项
| PolarFire Video Kit |
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| 智能摄像机参考设计使用PolarFire视频套件 | |
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1.通过MIPI CSI-2收到视频帧
2. And stored in the DDR via AXI-4 interconnect
3.推理前 - 从DDR读回框架
4. Converted from RAW to RGB, RGB to planer R, G, B and written back into DDR
5. CoreVectorBlox引擎在R，G，B阵列上推断推断，并将结果写回DDR
6. Mi-V sorts probabilities, creates an overlay frame with bounding boxes, classification results, fps etc. and stores the frame in DDR
7.读取并将原始视频帧与叠加帧一起读取并发送到HDMI显示屏 |
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